In an analog-to-digital converter (ADC), an input voltage having a common mode voltage is input to an ADC input preamplifier. A reference voltage having a common mode voltage is also applied to the ADC input preamplifier. The input preamplifier amplifies a common mode voltage offset between the ADC input voltage and the reference voltage. The common mode voltage of the ADC input voltage does not equal the common mode voltage of the reference voltage, therefore a gain of the ADC input preamplifier decreases. The gain decreases because the differential amplifier is biased at an un-balanced operation point due to the common mode voltage offset. The gain decreases as an offset between the two common mode voltages increases.
One cause of the common mode voltage offset is charge injection in a track and hold circuit coupled to the ADC input preamplifier. The charge injection causes the ADC input voltage to increase during a hold mode of the track and hold circuit. The increase in the ADC input voltage causes the common mode voltage of the ADC input voltage to go up or down. However, there is not a commensurate increase or decrease in the common mode voltage of the reference voltage. Thus, the absolute common mode voltage offset increases. As the absolute common mode voltage offset increases, the input preamplifier gain goes down.
What is needed is an apparatus and method to improve the input preamplifier gain by calibrating the ADC to minimize the common mode voltage offset as well as overcome other shortcomings noted above.